PLL does not seem to work correctly (bug report)

mlove
Posts: 4
Joined: Wed Aug 08, 2007 1:13 pm

PLL does not seem to work correctly (bug report)

Postby mlove » Wed Aug 08, 2007 3:36 pm

When using the Explorer demo with a crystal frequency between 8 and 16 MHz only the base clock functions correctly. When the PLL is ticked a divide by zero error occurs on the matlab command line. The mask shows zero for instructions, and prescaler says NaN. I was trying to get 40MIPS with the 8 MHz crystal which is within the allowable range of "FIN must be chosen to be in the range of 1.6 MHz to 16 MHz" (from data sheet). Could you have a look at this? Maybe I'm using the mask incorrectly?

By the way, Keep up the good work. I have been using rtw and embedded coder for years and this target is very well done :)

Im using the MC variation of the 33 series any plans to add these devices/ drivers?

LubinKerhuel
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Location: Marseille - France
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Postby LubinKerhuel » Wed Aug 08, 2007 11:40 pm

Thanks for the report.

PLL calculation is not yet described properly on the website. But the dialog should be user friendly. Here is a piece of information:

PLL parameters are computed automatically by the blockset. You have to provide only the quartz used and the desired MIPS to reach. The blockset will provide you with the closest solution possible respecting the many constraints of the PLL circuit.

On the version 0.94c, a bug makes the calculation unworkable as it is describe in the post above.

The problem is now resolved on the version 0.94d.

I couldn't test it completely; fell free to report what's going on...

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About the MC family, They will be supported in the next toolbox version. See the Release note page

Lubin


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