Model { Name "PID23y" Version 6.6 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.377" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions on ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowViewerIcons on SortedOrder on ExecutionContextIcon on ShowLinearizationAnnotations on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Tue Nov 11 16:59:50 2008" Creator "123" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "123" ModifiedDateFormat "%" LastModifiedDate "Thu May 28 16:42:36 2009" ModelVersionFormat "1.%" ConfigurationManager "None" SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" AccelVerboseBuild off TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ProdHWDeviceType "16-bit Generic" ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.2.0" Array { Type "Handle" Dimension 9 Simulink.SolverCC { $ObjectID 2 Version "1.2.0" StartTime "0.0" StopTime "10" AbsTol "auto" FixedStep "0.001" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "FixedStepDiscrete" SolverName "FixedStepDiscrete" ZeroCrossControl "UseLocalSettings" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" RateTranMode "Deterministic" } Simulink.DataIOCC { $ObjectID 3 Version "1.2.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.2.0" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnforceIntegerDowncast on ExpressionFolding on ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode on LifeSpan "1" BufferReusableBoundary on } Simulink.DebuggingCC { $ObjectID 5 Version "1.2.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "Warning" } Simulink.HardwareCC { $ObjectID 6 Array { Type "Cell" Dimension 2 Cell "ProdHWDeviceType" Cell "ProdEqTarget" PropName "DisabledProps" } Version "1.2.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 16 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "LittleEndian" ProdWordSize 16 ProdShiftRightIntArith on ProdHWDeviceType "16-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "32-bit Generic" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.2.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 1 Cell "TargetLang" PropName "DisabledProps" } Version "1.2.0" SystemTargetFile "dspic.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "dspic_pic30_gcc.tmf" PostCodeGenCommand "dsPIC_Compile()" Description "Embedded Target for Microchip dsPIC (real-t" "ime)" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ProcessScript "dspic_make_rtw_hook" ConfigAtBuild off CustomSource "myQEI.c" IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Version "1.2.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off PrefixModelToSubsysFcnNames on MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.STFCustomTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 5 Cell "GenerateSampleERTMain" Cell "MatFileLogging" Cell "SupportNonInlinedSFcns" Cell "UtilityFuncGeneration" Cell "IncludeMdlTerminateFcn" PropName "DisabledProps" } Version "1.2.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant off IncludeMdlTerminateFcn off CombineOutputUpdateFcns on SuppressErrorStatus on IncludeFileDelimiter "Auto" ERTCustomFileBanners on SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging off MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime off SupportNonInlinedSFcns off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off SystemTargetFile "dspic.tlc" DialogCategory 0 Array { Type "Handle" Dimension 1 Simulink.ERTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Array { Type "Cell" Dimension 8 Cell "GenerateSampleERTMain" Cell "GenerateErtSFunction" Cell "MatFileLogging" Cell "GRTInterface" Cell "ERTCustomFileTemplate" Cell "SupportNonInlinedSFcns" Cell "UtilityFuncGeneration" Cell "IncludeMdlTerminateFcn" PropName "DisabledProps" } Version "1.2.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant off IncludeMdlTerminateFcn off CombineOutputUpdateFcns on SuppressErrorStatus on IncludeFileDelimiter "Auto" ERTCustomFileBanners on SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging off MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime off SupportNonInlinedSFcns off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off GenerateErtSFunction off GenerateASAP2 off ExtMode off ExtModeTransport 0 ExtModeStaticAlloc off ExtModeStaticAllocSize 1000000 ExtModeTesting off ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" InlinedParameterPlacement "NonHierarchical" TargetOS "BareBoardExample" MultiInstanceErrorCode "Error" RateGroupingCode on RootIOFormat "Individual arguments" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off ERTSrcFileBannerTemplate "dsPIC_code_template.cgt" ERTHdrFileBannerTemplate "dsPIC_code_template.cgt" ERTDataSrcFileTemplate "dsPIC_code_template.cgt" ERTDataHdrFileTemplate "dsPIC_code_template.cgt" ERTCustomFileTemplate "dsPIC_main.tlc" ModuleNamingRule "Unspecified" SignalDisplayLevel 10 ParamTuneLevel 10 GlobalDataDefinition "Auto" DataDefinitionFile "global.c" GlobalDataReference "Auto" DataReferenceFile "global.h" GRTInterface off PreserveExpressionOrder off PreserveIfCondition off EnableUserReplacementTypes off Array { Type "Struct" Dimension 1 MATStruct { double "" single "" int32 "" int16 "" int8 "" uint32 "" uint16 "" uint8 "" boolean "" int "" uint "" char "" } PropName "ReplacementTypes" } MemSecPackage "--- None ---" MemSecDataConstants "Default" MemSecDataIO "Default" MemSecDataInternal "Default" MemSecDataParameters "Default" MemSecFuncInitTerm "Default" MemSecFuncExecute "Default" } PropName "Components" } CustomProperty { DataType "string" Name "GMAKE_PLACE" Value "C:\\PROGRA~2\\MATLAB\\R2007a\\rtw\\bi" "n\\win32\\gmake" } CustomProperty { DataType "string" Name "OPTIM_GCC" Value "-mcpu=30f4012 -O3 -fschedule-insns -f" "schedule-insns2" } CustomProperty { DataType "string" Name "LDFLAGS" Value "-t --report-mem -Map ../untitled.map " "--heap 0 -cref" } CustomProperty { DataType "string" Name "LDPICTYPE" Value "-T C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\" "support\\dsPIC30F\\gld\\p30f4012.gld" } CustomProperty { DataType "string" Name "LDLIBPIC" Value "C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\lib" "\\libpic30-coff.a C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\lib\\dsPIC30F\\libp30f40" "12-coff.a C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\lib\\libc-coff.a C:\\PROGRA~2\\MI" "CROC~1\\MPLABC~1\\lib\\libm-coff.a" } CustomProperty { DataType "string" Name "PIC_INCLUDES" Value "-I C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\" "include" } CustomProperty { DataType "string" Name "PIC_REF" Value "30f4012" } CustomProperty { DataType "string" Name "GCCPATH" Value "''" } } PropName "Components" } } hdlcoderui.hdlcc { $ObjectID 12 Description "HDL Coder custom configuration component" Version "1.2.0" Name "HDL Coder" Array { Type "Cell" Dimension 1 Cell "" PropName "HDLConfigFile" } HDLCActiveTab "0" } DES.SimEventsCC { $ObjectID 13 Version "1.2.0" Name "SimEvents" propIdentEvents "0" propIdentEventSeed "123456789" propUnconnectedPorts "0" propLogEventsScheduled 0 propLogEventsExecuted 0 propLogDepartureEvents 0 propDisplayEventCalendar 0 } PropName "Components" } Name "Configuration" CurrentDlgPage "Diagnostics/Model Referencing" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType Abs SaturateOnIntegerOverflow on ZeroCross on SampleTime "-1" } Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "sfix(16)" ConRadixGroup "Use specified scaling" OutScaling "2^0" SampleTime "inf" FramePeriod "inf" } Block { BlockType DataStoreMemory ReadBeforeWriteMsg "none" WriteAfterWriteMsg "none" WriteAfterReadMsg "none" StateMustResolveToSignalObject off ShowAdditionalParam off DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" } Block { BlockType DataStoreRead } Block { BlockType DataStoreWrite } Block { BlockType DataTypeConversion OutDataTypeMode "Inherit via back propagation" OutDataType "sfix(16)" OutScaling "2^0" LockScale off ConvertRealWorld "Real World Value (RWV)" RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType DiscreteIntegrator IntegratorMethod "Integration: Forward Euler" gainval "1.0" ExternalReset "none" InitialConditionSource "internal" InitialCondition "0" InitialConditionMode "State and output" SampleTime "1" OutDataTypeMode "Inherit via internal rule" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow off LimitOutput off UpperSaturationLimit "inf" LowerSaturationLimit "-inf" ShowSaturationPort off ShowStatePort off IgnoreLimit off StateMustResolveToSignalObject off RTWStateStorageClass "Auto" } Block { BlockType DiscretePulseGenerator PulseType "Sample based" TimeSource "Use simulation time" Amplitude "1" Period "2" PulseWidth "1" PhaseDelay "0" SampleTime "1" VectorParams1D on } Block { BlockType DiscreteTransferFcn Numerator "[1]" Denominator "[1 0.5]" SampleTime "1" StateMustResolveToSignalObject off RTWStateStorageClass "Auto" Realization "auto" } Block { BlockType Display Format "short" Decimation "10" Floating off SampleTime "-1" } Block { BlockType EnablePort StatesWhenEnabling "held" ShowOutputPort off ZeroCross on } Block { BlockType Gain Gain "1" Multiplication "Element-wise(K.*u)" ParameterDataTypeMode "Same as input" ParameterDataType "sfix(16)" ParameterScalingMode "Best Precision: Matrix-wise" ParameterScaling "2^0" OutDataTypeMode "Same as input" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Ground } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchByCopyingInsideSignal off Interpolate on } Block { BlockType Logic Operator "AND" Inputs "2" IconShape "rectangular" AllPortsSameDT on OutDataTypeMode "Logical (see Configuration Parameters: Optimiza" "tion)" LogicDataType "uint(8)" SampleTime "-1" } Block { BlockType Memory X0 "0" InheritSampleTime off LinearizeMemory off LinearizeAsDelay off StateMustResolveToSignalObject off RTWStateStorageClass "Auto" } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType Product Inputs "2" Multiplication "Element-wise(.*)" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutDataTypeMode "Same as first input" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType RelationalOperator Operator ">=" InputSameDT on LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimiza" "tion)" LogicDataType "uint(8)" ZeroCross on SampleTime "-1" } Block { BlockType Saturate UpperLimit "0.5" LowerLimit "-0.5" LinearizeAsGain on ZeroCross on SampleTime "-1" } Block { BlockType Scope ModelBased off TickLabels "OneTimeTick" ZoomMode "on" Grid "on" TimeRange "auto" YMin "-5" YMax "5" SaveToWorkspace off SaveName "ScopeData" LimitDataPoints on MaxDataPoints "5000" Decimation "1" SampleInput off SampleTime "-1" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" } Block { BlockType Step Time "1" Before "0" After "1" SampleTime "-1" VectorParams1D on ZeroCross on } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Sum IconShape "rectangular" Inputs "++" CollapseMode "All dimensions" CollapseDim "1" InputSameDT on OutDataTypeMode "Same as first input" OutDataType "sfix(16)" OutScaling "2^0" LockScale off RndMeth "Floor" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType Terminator } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Arial" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "PID23y" Location [519, 77, 1092, 403] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" ReportName "simulink-default.rpt" Block { BlockType Reference Name "Configure Model \nfor dsPIC" Ports [] Position [130, 15, 223, 58] ForegroundColor "blue" BackgroundColor "yellow" DropShadow on SourceBlock "dsPICdrivers/Simulink Configuration/Configure M" "odel \nfor dsPIC" SourceType "" } Block { BlockType SubSystem Name "Configure QEI\n(Called Once)" Ports [0, 0, 1] Position [420, 19, 520, 61] BackgroundColor "magenta" TreatAsAtomicUnit on MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Configure QEI\n(Called Once)" Location [421, 301, 800, 485] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType EnablePort Name "Enable" Ports [] Position [160, 20, 180, 40] } Block { BlockType Reference Name "InitQEI \n(Called Once)" Tag "dsPIC_dsPIC_CFunctionCall" Ports [] Position [100, 80, 225, 120] BackgroundColor "magenta" List { ListType RTWdata FctDeclaration "extern void QEIInit();" FctCall "QEIInit();" fctName "QEIInit" INPUT_SIZE "1" OUTPUT_SIZE "1" NBR_INPUT "0" NBR_OUTPUT "0" } SourceBlock "dsPICdrivers/OTHERS/C Function Call" SourceType "C Function Call" fctName "'QEIInit'" INPUT_SIZE "1" INPUT1 "--" INPUT2 "--" INPUT3 "--" OUTPUT_SIZE "1" OUTPUT1 "--" SampleTime "inf" InputType "[ ]" OutputType "[ ]" FctDeclaration "extern void QEIInit();" FctCall "QEIInit();" OrderingInOutPopup "None" } } } Block { BlockType SubSystem Name "Filtro Pasa Bajos" Ports [1, 1] Position [165, 231, 245, 289] BackgroundColor "lightBlue" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Filtro Pasa Bajos" Location [206, 539, 851, 874] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Seņal" Position [25, 43, 55, 57] IconDisplay "Port number" } Block { BlockType DataTypeConversion Name "Data Type Conversion" Position [345, 42, 395, 58] OutDataTypeMode "uint16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion1" Position [115, 42, 165, 58] OutDataTypeMode "double" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DiscreteTransferFcn Name "Low pass Filter" Position [210, 17, 295, 83] Numerator "[.01478 .01478]" Denominator "[1 -.9704]" SampleTime ".001" } Block { BlockType Outport Name "Filtrada" Position [440, 43, 470, 57] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Data Type Conversion1" SrcPort 1 DstBlock "Low pass Filter" DstPort 1 } Line { SrcBlock "Low pass Filter" SrcPort 1 DstBlock "Data Type Conversion" DstPort 1 } Line { SrcBlock "Data Type Conversion" SrcPort 1 DstBlock "Filtrada" DstPort 1 } Line { SrcBlock "Seņal" SrcPort 1 DstBlock "Data Type Conversion1" DstPort 1 } } } Block { BlockType SubSystem Name "Genera un retardo\nde 3 s para que estabilice\n" "el sistema (ADC)" Ports [0, 1] Position [265, 103, 350, 157] BackgroundColor "orange" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Genera un retardo\nde 3 s para que estabilice" "\nel sistema (ADC)" Location [382, 700, 896, 956] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType SubSystem Name "Contador\nhasta 3" Ports [0, 1] Position [50, 78, 150, 142] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Contador\nhasta 3" Location [327, 557, 881, 843] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Constant Name "Constant" Position [95, 190, 125, 220] } Block { BlockType Reference Name "Counter" Ports [2, 1] Position [175, 110, 245, 170] SourceBlock "dspswit3/Counter" SourceType "Counter" Direction "Up" CountEvent "Rising edge" CounterSize "16 bits" MaxCount "255" InitialCount "0" Output "Count" HitValue "32" ResetInput on SamplesPerFrame "1" Ts "1" CntDtype "double" HitDtype "Logical" } Block { BlockType Gain Name "Gain" Position [285, 215, 315, 245] Gain "1/500" ParameterDataTypeMode "Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator" Ports [2, 1] Position [110, 107, 140, 138] AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Memory Name "Memory" Position [45, 65, 75, 95] } Block { BlockType DiscretePulseGenerator Name "Pulse\nGenerator" Ports [0, 1] Position [25, 138, 70, 172] PulseType "Time based" Period ".002" PulseWidth "50" } Block { BlockType Reference Name "Retarda 3 segundos\npara que estabilice" " el sistema" Ports [1, 1] Position [295, 128, 345, 152] LinkData { BlockName "Compare" DialogParameters { Operator ">=" LogicOutDataTypeMode "Boolean" ZeroCross "off" } } SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<=" const "1500" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Scope Name "Scope" Ports [1] Position [380, 209, 410, 241] Floating off Location [386, 115, 710, 354] Open off NumInputPorts "1" List { ListType AxesTitles axes1 "%" } SaveName "ScopeData2" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Outport Name "Contador" Position [470, 200, 500, 215] Orientation "down" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Retarda 3 segundos\npara que estabilice" " el sistema" SrcPort 1 Points [15, 0; 0, -110; -335, 0] DstBlock "Memory" DstPort 1 } Line { SrcBlock "Counter" SrcPort 1 Points [10, 0] Branch { DstBlock "Retarda 3 segundos\npara que estabili" "ce el sistema" DstPort 1 } Branch { Points [0, 90] DstBlock "Gain" DstPort 1 } } Line { SrcBlock "Logical\nOperator" SrcPort 1 DstBlock "Counter" DstPort 1 } Line { SrcBlock "Pulse\nGenerator" SrcPort 1 Points [20, 0] DstBlock "Logical\nOperator" DstPort 2 } Line { SrcBlock "Memory" SrcPort 1 Points [15, 0] DstBlock "Logical\nOperator" DstPort 1 } Line { SrcBlock "Constant" SrcPort 1 Points [15, 0; 0, -50] DstBlock "Counter" DstPort 2 } Line { SrcBlock "Gain" SrcPort 1 Points [40, 0] Branch { Points [5, 0] DstBlock "Scope" DstPort 1 } Branch { Points [0, -45] DstBlock "Contador" DstPort 1 } } } } Block { BlockType Reference Name "Retarda 3 segundos\npara que estabilice el " "sistema2" Ports [1, 1] Position [195, 98, 245, 122] SourceBlock "simulink/Logic and Bit\nOperations/Compare" "\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">=" const "3" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Scope Name "Scope" Ports [1] Position [320, 149, 350, 181] Floating off Location [219, 320, 543, 559] Open off NumInputPorts "1" List { ListType AxesTitles axes1 "%" } SaveName "ScopeData3" DataFormat "StructureWithTime" SampleTime "0" } Block { BlockType Outport Name "Reloj" Position [405, 103, 435, 117] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Contador\nhasta 3" SrcPort 1 DstBlock "Retarda 3 segundos\npara que estabilice el " "sistema2" DstPort 1 } Line { SrcBlock "Retarda 3 segundos\npara que estabilice el " "sistema2" SrcPort 1 Points [35, 0] Branch { DstBlock "Reloj" DstPort 1 } Branch { Points [0, 55] DstBlock "Scope" DstPort 1 } } } } Block { BlockType Reference Name "Generate Code" Ports [] Position [245, 20, 343, 64] ForegroundColor "blue" BackgroundColor "yellow" DropShadow on SourceBlock "dsPICdrivers/Simulink Configuration/Generate Co" "de" SourceType "" } Block { BlockType Reference Name "Master" Tag "dsPIC_MASTER" Ports [] Position [20, 15, 113, 60] BackgroundColor "lightBlue" DropShadow on Priority "1" List { ListType RTWdata NumBusyPort "-1" } SourceBlock "dsPICdrivers/Master" SourceType "Master" TimeStepType "Timer1" picType "30f4012" fcy "30e6" Quartz_33f "5e6" PLLActive_33f off fcyDesired_33f "0" tmr1 "[1 29999 0]" tmr1Info "Time Step : 0.001 ; Error : 0% PR1=29999" tmr2345 "[0 0 0 0]" tmr2345cfg "[-1 -1 -1 -1]" IOautoConf on typePort "[ 0 0 0 0 0 0 0 0 0 0 0 0" " 0 0 0 0 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 " " 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 10 " " 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 " "0 0 0 0 0 0 0 0 0 0 0 0 0 4 5 0 0 0 0 0" " 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 " " 0 0 0 0 ]" TRIS "[ 65535 65535 65535 65532 65535 65535 655" "35 ]" ADPCFG "0" MasterBusyPort "None" MasterOverloadPort "None" FOSC "FRC_PLL16" ClockSwitchMonitor "Both disabled" TempProtection_33f "TEMP_ON" FPBOR "PBOR_OFF" PWRT "PWRT_OFF" MCLR "MCLR_DIS" PowerSave off OverrideFcy off NewFcy "1e6" } Block { BlockType Reference Name "Sensado de Fuerzas" Tag "dsPIC_ADC" Ports [0, 1] Position [25, 230, 120, 290] BackgroundColor "green" Priority "5" List { ListType RTWdata DMAChannel "0" } SourceBlock "dsPICdrivers/Peripheral I//O/ADC Input" SourceType "dsPIC : ADC10" ADC_TYPE "10 bits" ADC_MODE "Continuous sampling & get last channel value" NbrSampleStep "1" VoltRefpopup "AVdd - AVss" OutFormatBitspopup "0000 00dd dddd dddd : Integer" InterruptPriority "1" ANCHANNELS "[0]" MaxName "ANmax = 1024" Rin "1e2" ADCS "9" SAMC "1" Temperature "25" DMAChannel "0" SampleTime ".001" Status "OK | Tsmp=1.667e-007 | T/Channel=2.167e-006 " "| Tall=2.167e-006" } Block { BlockType SubSystem Name "Sistema" Ports [1, 0, 1] Position [305, 205, 525, 315] BackgroundColor "[0.501961, 0.501961, 1.000000]" TreatAsAtomicUnit on MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Sistema" Location [25, 376, 923, 845] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Del ADC\nfiltrado" Position [135, 138, 165, 152] IconDisplay "Port number" } Block { BlockType EnablePort Name "Enable" Ports [] Position [710, 25, 730, 45] BackgroundColor "green" } Block { BlockType SubSystem Name "Comparador de niveles" Ports [1, 2] Position [240, 116, 305, 169] BackgroundColor "[0.019608, 0.772549, 0.568627]" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Comparador de niveles" Location [458, 712, 1075, 961] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "119" Block { BlockType Inport Name "Del filtro" Position [55, 103, 85, 117] IconDisplay "Port number" } Block { BlockType Reference Name "< ON" Ports [1, 1] Position [255, 38, 305, 62] SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" const "250" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "<1,5V ON1" Ports [1, 1] Position [250, 138, 300, 162] SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">=" const "384" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name ">." Ports [1, 1] Position [255, 100, 300, 120] SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">=" const "550" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType DataTypeConversion Name "Data Type Conversion" Position [135, 102, 185, 118] OutDataTypeMode "uint16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator2" Ports [2, 1] Position [390, 62, 420, 93] Operator "OR" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Outport Name "Mover" Position [475, 73, 505, 87] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Direccion" Position [475, 143, 505, 157] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "< ON" SrcPort 1 Points [35, 0; 0, 20] DstBlock "Logical\nOperator2" DstPort 1 } Line { SrcBlock ">." SrcPort 1 Points [40, 0; 0, -25] DstBlock "Logical\nOperator2" DstPort 2 } Line { SrcBlock "<1,5V ON1" SrcPort 1 DstBlock "Direccion" DstPort 1 } Line { SrcBlock "Logical\nOperator2" SrcPort 1 DstBlock "Mover" DstPort 1 } Line { SrcBlock "Del filtro" SrcPort 1 DstBlock "Data Type Conversion" DstPort 1 } Line { SrcBlock "Data Type Conversion" SrcPort 1 Points [30, 0] Branch { DstBlock ">." DstPort 1 } Branch { Points [0, -60] DstBlock "< ON" DstPort 1 } Branch { Points [0, 40] DstBlock "<1,5V ON1" DstPort 1 } } Annotation { Name "Mueve derecha" Position [390, 29] } Annotation { Name "Mueve a izquierda" Position [394, 144] } } } Block { BlockType DataStoreRead Name "Data Store\nPosicion \ndeseada" Position [71, 200, 119, 245] Orientation "down" BackgroundColor "green" NamePlacement "alternate" DataStoreName "Deseada" SampleTime ".001" } Block { BlockType DataStoreRead Name "Data Store\nRead" Position [545, 326, 605, 384] BackgroundColor "yellow" NamePlacement "alternate" DataStoreName "Posicion" SampleTime ".001" } Block { BlockType DataStoreWrite Name "Data Store\nWrite" Position [400, 29, 435, 61] DataStoreName "Posicion" SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion" Position [480, 516, 535, 534] BackgroundColor "gray" OutDataTypeMode "int16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion1" Position [480, 486, 535, 504] BackgroundColor "gray" OutDataTypeMode "int16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType SubSystem Name "Decrementa \nPos Deseada" Ports [0, 0, 1] Position [494, 154, 523, 182] Orientation "up" BackgroundColor "green" TreatAsAtomicUnit on MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Decrementa \nPos Deseada" Location [716, 155, 1196, 390] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType EnablePort Name "Enable" Ports [] Position [40, 90, 60, 110] } Block { BlockType Constant Name "Constant" Position [140, 160, 170, 190] Orientation "up" NamePlacement "alternate" OutDataTypeMode "int32" SampleTime ".001" } Block { BlockType DataStoreRead Name "Data Store\nRead2" Position [133, 20, 177, 60] Orientation "down" NamePlacement "alternate" DataStoreName "Deseada" SampleTime ".001" } Block { BlockType DataStoreWrite Name "Data Store\nWrite1" Position [230, 93, 275, 127] DataStoreName "Deseada" SampleTime ".001" } Block { BlockType DataStoreWrite Name "Data Store\nWrite2" Position [245, 23, 290, 57] DataStoreName "Anterior" SampleTime ".001" } Block { BlockType Display Name "Display" Ports [1] Position [375, 55, 465, 85] Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" Ports [1] Position [365, 155, 455, 185] Decimation "1" Lockdown off } Block { BlockType Sum Name "Sum1" Ports [2, 1] Position [145, 100, 165, 120] ShowName off IconShape "round" Inputs "+-" CollapseMode "All dimensions" InputSameDT off OutDataTypeMode "Inherit via internal rule" SaturateOnIntegerOverflow off SampleTime ".001" } Line { SrcBlock "Sum1" SrcPort 1 Points [40, 0] Branch { DstBlock "Data Store\nWrite1" DstPort 1 } Branch { Points [0, 60] DstBlock "Display1" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Data Store\nRead2" SrcPort 1 Points [0, 20] Branch { DstBlock "Sum1" DstPort 1 } Branch { Points [45, 0; 0, -45; 5, 0] Branch { DstBlock "Data Store\nWrite2" DstPort 1 } Branch { Points [0, 30] DstBlock "Display" DstPort 1 } } } } } Block { BlockType Display Name "Display" Ports [1] Position [250, 235, 340, 265] Decimation "1" Lockdown off } Block { BlockType Reference Name "Get Position \n(Called Every Sample Time)" Tag "dsPIC_dsPIC_CFunctionCall" Ports [0, 1] Position [285, 21, 355, 69] List { ListType RTWdata FctDeclaration "extern int32_T GetQEI();" FctCall "%y1 = GetQEI();" fctName "GetQEI" INPUT_SIZE "1" OUTPUT_SIZE "1" NBR_INPUT "0" NBR_OUTPUT "1" } SourceBlock "dsPICdrivers/OTHERS/C Function Call" SourceType "C Function Call" fctName "'GetQEI'" INPUT_SIZE "1" INPUT1 "--" INPUT2 "--" INPUT3 "--" OUTPUT_SIZE "1" OUTPUT1 "int32" SampleTime ".001" InputType "[ ]" OutputType "[ 5 ]" FctDeclaration "extern int32_T GetQEI();" FctCall "%y1 = GetQEI();" OrderingInOutPopup "None" Port { PortNumber 1 Name "current_position" RTWStorageClass "Auto" DataLoggingNameMode "SignalName" } } Block { BlockType SubSystem Name "Inc/Dec motion" Ports [2, 2] Position [370, 116, 435, 169] MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Inc/Dec motion" Location [544, 80, 1221, 563] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Move" Position [15, 28, 45, 42] IconDisplay "Port number" } Block { BlockType Inport Name "Dir" Position [15, 103, 45, 117] Port "2" IconDisplay "Port number" } Block { BlockType Logic Name "Logical\nOperator" Ports [1, 1] Position [145, 19, 175, 51] Operator "NOT" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator1" Ports [1, 1] Position [140, 94, 170, 126] Operator "NOT" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator2" Ports [2, 1] Position [250, 27, 280, 58] AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator3" Ports [2, 1] Position [250, 132, 280, 163] AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator4" Ports [3, 1] Position [365, 115, 405, 185] Operator "NOR" Inputs "3" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator5" Ports [2, 1] Position [245, 212, 275, 243] AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator6" Ports [3, 1] Position [365, 278, 395, 312] Operator "NOR" Inputs "3" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Logic Name "Logical\nOperator7" Ports [2, 1] Position [255, 277, 285, 308] AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Outport Name "Increm" Position [530, 143, 560, 157] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "Decrem" Position [540, 283, 570, 297] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Logical\nOperator4" SrcPort 1 DstBlock "Increm" DstPort 1 } Line { SrcBlock "Move" SrcPort 1 Points [60, 0] Branch { DstBlock "Logical\nOperator" DstPort 1 } Branch { Points [0, 120] Branch { DstBlock "Logical\nOperator3" DstPort 2 } Branch { Points [0, 130] DstBlock "Logical\nOperator7" DstPort 1 } } } Line { SrcBlock "Dir" SrcPort 1 Points [45, 0] Branch { DstBlock "Logical\nOperator1" DstPort 1 } Branch { Points [0, 110] Branch { DstBlock "Logical\nOperator5" DstPort 1 } Branch { Points [0, 80] DstBlock "Logical\nOperator7" DstPort 2 } } } Line { SrcBlock "Logical\nOperator" SrcPort 1 Points [15, 0] Branch { DstBlock "Logical\nOperator2" DstPort 1 } Branch { Points [0, 200] DstBlock "Logical\nOperator5" DstPort 2 } } Line { SrcBlock "Logical\nOperator1" SrcPort 1 Points [30, 0] Branch { Points [0, -60] DstBlock "Logical\nOperator2" DstPort 2 } Branch { Points [0, 30] DstBlock "Logical\nOperator3" DstPort 1 } } Line { SrcBlock "Logical\nOperator2" SrcPort 1 Points [25, 0] Branch { Points [15, 0; 0, 80] DstBlock "Logical\nOperator4" DstPort 1 } Branch { Points [0, 240] DstBlock "Logical\nOperator6" DstPort 1 } } Line { SrcBlock "Logical\nOperator3" SrcPort 1 DstBlock "Logical\nOperator4" DstPort 2 } Line { SrcBlock "Logical\nOperator5" SrcPort 1 Points [15, 0] Branch { Points [35, 0; 0, -55] DstBlock "Logical\nOperator4" DstPort 3 } Branch { Points [0, 65] DstBlock "Logical\nOperator6" DstPort 2 } } Line { SrcBlock "Logical\nOperator6" SrcPort 1 Points [0, -5] DstBlock "Decrem" DstPort 1 } Line { SrcBlock "Logical\nOperator7" SrcPort 1 Points [0, 10] DstBlock "Logical\nOperator6" DstPort 3 } Annotation { Name "M D INC DEC\n0 0 0 0\n0 " " 1 0 0\n1 0 0 1\n1 1 1 0" Position [519, 225] } } } Block { BlockType SubSystem Name "Incrementa \nPos Deseada" Ports [0, 0, 1] Position [575, 115, 603, 142] Orientation "up" BackgroundColor "green" TreatAsAtomicUnit on MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Incrementa \nPos Deseada" Location [643, 405, 1203, 683] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType EnablePort Name "Enable" Ports [] Position [40, 90, 60, 110] } Block { BlockType Constant Name "Constant" Position [155, 220, 185, 250] Orientation "up" NamePlacement "alternate" OutDataTypeMode "int32" SampleTime ".001" } Block { BlockType DataStoreRead Name "Data Store\nRead2" Position [148, 25, 192, 65] Orientation "down" NamePlacement "alternate" DataStoreName "Deseada" SampleTime ".001" } Block { BlockType DataStoreWrite Name "Data Store\nWrite1" Position [340, 153, 385, 187] DataStoreName "Deseada" SampleTime ".001" } Block { BlockType DataStoreWrite Name "Data Store\nWrite2" Position [340, 78, 385, 112] DataStoreName "Anterior" SampleTime ".001" } Block { BlockType Display Name "Display" Ports [1] Position [270, 35, 360, 65] Decimation "1" Lockdown off } Block { BlockType Display Name "Display1" Ports [1] Position [410, 120, 500, 150] Decimation "1" Lockdown off } Block { BlockType Sum Name "Sum1" Ports [2, 1] Position [160, 160, 180, 180] ShowName off IconShape "round" CollapseMode "All dimensions" InputSameDT off OutDataTypeMode "Inherit via internal rule" SaturateOnIntegerOverflow off SampleTime ".001" } Line { SrcBlock "Sum1" SrcPort 1 Points [100, 0] Branch { DstBlock "Data Store\nWrite1" DstPort 1 } Branch { Points [0, -35] DstBlock "Display1" DstPort 1 } } Line { SrcBlock "Constant" SrcPort 1 DstBlock "Sum1" DstPort 2 } Line { SrcBlock "Data Store\nRead2" SrcPort 1 Points [0, 65] Branch { DstBlock "Sum1" DstPort 1 } Branch { Points [45, 0; 0, -40] Branch { DstBlock "Data Store\nWrite2" DstPort 1 } Branch { Points [0, -45] DstBlock "Display" DstPort 1 } } } } } Block { BlockType SubSystem Name "PID Control" Ports [2, 3] Position [230, 321, 300, 389] BackgroundColor "darkGreen" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "PID Control" Location [138, 509, 1086, 887] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "Error" Position [40, 83, 70, 97] IconDisplay "Port number" } Block { BlockType Inport Name "qr" Position [40, 193, 70, 207] Port "2" IconDisplay "Port number" } Block { BlockType Reference Name "<1,5V ON" Ports [1, 1] Position [630, 178, 680, 202] SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<" const "0" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "<1,5V ON1" Ports [1, 1] Position [630, 113, 680, 137] SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<=" const "-3" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "<1,5V ON2" Ports [1, 1] Position [630, 58, 680, 82] SourceBlock "simulink/Logic and Bit\nOperations/Comp" "are\nTo Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">=" const "3" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Abs Name "Abs" Position [675, 250, 695, 280] SampleTime ".001" } Block { BlockType DataTypeConversion Name "D Conversion" Position [150, 75, 190, 105] OutDataTypeMode "double" RndMeth "Floor" SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion1" Position [155, 185, 195, 215] OutDataTypeMode "double" RndMeth "Floor" SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion3" Position [815, 259, 850, 291] OutDataTypeMode "uint16" RndMeth "Floor" SampleTime ".001" } Block { BlockType Reference Name "Discrete\nPID Controller1" Ports [1, 1] Position [280, 180, 320, 220] DialogController "POWERSYS.PowerSysDialog" SourceBlock "powerlib_extras/Discrete \nControl Bloc" "ks/Discrete\nPID Controller" SourceType "Discrete PID Controller" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Kp "40" Ki "0.1" Kd ".3" TcD "0.5e-3" Par_Limits "[1e6 -1e6]" Init "0" Ts ".001" } Block { BlockType Logic Name "Logical\nOperator" Ports [2, 1] Position [710, 82, 740, 113] Operator "OR" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType Saturate Name "Saturation" Position [625, 250, 655, 280] UpperLimit "38000" LowerLimit "-38000" LinearizeAsGain off SampleTime ".001" } Block { BlockType Sum Name "Sum" Ports [2, 1] Position [510, 170, 540, 210] ShowName off Inputs "--" CollapseMode "All dimensions" InputSameDT off OutDataTypeMode "Inherit via internal rule" SampleTime ".001" } Block { BlockType Sum Name "Sum2" Ports [2, 1] Position [755, 257, 775, 288] ShowName off Inputs "-+" CollapseMode "All dimensions" InputSameDT off OutDataTypeMode "Inherit via internal rule" SampleTime ".001" } Block { BlockType Gain Name "kd2" Position [265, 69, 315, 111] Gain "50" ParameterDataTypeMode "Inherit via internal rule" OutDataTypeMode "Inherit via internal rule" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType Constant Name "max pwm" Position [675, 315, 705, 345] NamePlacement "alternate" Value "38000" SampleTime ".001" } Block { BlockType Outport Name "D0\nDIR" Position [800, 183, 830, 197] IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "BRK" Position [790, 93, 820, 107] Port "2" IconDisplay "Port number" BusOutputAsStruct off } Block { BlockType Outport Name "\nPWM" Position [900, 268, 930, 282] Port "3" IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "Error" SrcPort 1 DstBlock "D Conversion" DstPort 1 } Line { SrcBlock "Sum" SrcPort 1 Points [50, 0] Branch { DstBlock "<1,5V ON" DstPort 1 } Branch { Points [0, -65] Branch { DstBlock "<1,5V ON1" DstPort 1 } Branch { Points [0, -55] DstBlock "<1,5V ON2" DstPort 1 } } Branch { Points [0, 75] DstBlock "Saturation" DstPort 1 } } Line { SrcBlock "kd2" SrcPort 1 Points [175, 0] DstBlock "Sum" DstPort 1 } Line { SrcBlock "<1,5V ON" SrcPort 1 DstBlock "D0\nDIR" DstPort 1 } Line { SrcBlock "Data Type Conversion3" SrcPort 1 DstBlock "\nPWM" DstPort 1 } Line { SrcBlock "D Conversion" SrcPort 1 DstBlock "kd2" DstPort 1 } Line { SrcBlock "<1,5V ON2" SrcPort 1 Points [0, 20] DstBlock "Logical\nOperator" DstPort 1 } Line { SrcBlock "<1,5V ON1" SrcPort 1 Points [0, -20] DstBlock "Logical\nOperator" DstPort 2 } Line { SrcBlock "Logical\nOperator" SrcPort 1 DstBlock "BRK" DstPort 1 } Line { SrcBlock "Saturation" SrcPort 1 DstBlock "Abs" DstPort 1 } Line { SrcBlock "Data Type Conversion1" SrcPort 1 DstBlock "Discrete\nPID Controller1" DstPort 1 } Line { SrcBlock "Discrete\nPID Controller1" SrcPort 1 DstBlock "Sum" DstPort 2 } Line { SrcBlock "qr" SrcPort 1 DstBlock "Data Type Conversion1" DstPort 1 } Line { SrcBlock "max pwm" SrcPort 1 Points [25, 0; 0, -50] DstBlock "Sum2" DstPort 2 } Line { SrcBlock "Abs" SrcPort 1 DstBlock "Sum2" DstPort 1 } Line { SrcBlock "Sum2" SrcPort 1 DstBlock "Data Type Conversion3" DstPort 1 } Annotation { Name "Kp=40\nKd=0.3\nKi=0.1" Position [305, 38] } Annotation { Name "e=q-qd" Position [237, 77] } Annotation { Name "mglsin0" Position [570, 229] } } } Block { BlockType SubSystem Name "PWM \nDIR\nBRK" Ports [3] Position [375, 328, 415, 382] BackgroundColor "yellow" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "PWM \nDIR\nBRK" Location [797, 118, 1188, 421] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "DIR" Position [50, 28, 80, 42] IconDisplay "Port number" } Block { BlockType Inport Name "BRK" Position [40, 133, 70, 147] Port "2" IconDisplay "Port number" } Block { BlockType Inport Name "PWM" Position [30, 223, 60, 237] Port "3" IconDisplay "Port number" } Block { BlockType Reference Name "BRAKE \n1 move\n0 stop" Tag "dsPIC_Digital_Output" Ports [1] Position [175, 121, 275, 159] Priority "5" SourceBlock "dsPICdrivers/Digital I//O/Digital Outpu" "t Write" SourceType "" PORT "D" Pin "[1]" Simultaneous off OrderingInOutPopup "None" } Block { BlockType Reference Name "PWM Motor Output" Tag "dsPIC_PWM_Motor" Ports [1] Position [145, 214, 210, 246] Priority "5" SourceBlock "dsPICdrivers/Peripheral I//O/PWM Motor " "Output" SourceType "PWM Motor Output" InputEnableChk off InputPeriodeChk off Channel "[1 ]" TPeriode ".01" PrescalerValue "16" PeriodeInteger "18750" MaxName "'PWM'" Centered off HChannelON off Info "Nbr Bits : 15.1946 || PWM = 37500 ||" " Prescaler = 16" Delay "0" IntPriority "5" nbrPwmChannelPIC "3" Status "OK" } Block { BlockType Reference Name "Sentido \n1 InversoaMR\n0 SMR" Tag "dsPIC_Digital_Output" Ports [1] Position [255, 12, 360, 58] Priority "5" SourceBlock "dsPICdrivers/Digital I//O/Digital Outpu" "t Write" SourceType "" PORT "D" Pin "[0]" Simultaneous off OrderingInOutPopup "None" } Line { SrcBlock "DIR" SrcPort 1 DstBlock "Sentido \n1 InversoaMR\n0 SMR" DstPort 1 } Line { SrcBlock "BRK" SrcPort 1 DstBlock "BRAKE \n1 move\n0 stop" DstPort 1 } Line { SrcBlock "PWM" SrcPort 1 DstBlock "PWM Motor Output" DstPort 1 } } } Block { BlockType DataStoreMemory Name "Posicion\ndeseada" Position [455, 29, 494, 65] DataStoreName "Deseada" ReadBeforeWriteMsg "warning" WriteAfterWriteMsg "warning" WriteAfterReadMsg "warning" InitialValue "0" RTWStateStorageClass "ExportedGlobal" VectorParams1D on ShowAdditionalParam off } Block { BlockType DataStoreMemory Name "Posicion\ndeseada1" Position [510, 29, 548, 65] DataStoreName "Anterior" ReadBeforeWriteMsg "warning" WriteAfterWriteMsg "warning" WriteAfterReadMsg "warning" InitialValue "0" RTWStateStorageClass "ExportedGlobal" VectorParams1D on ShowAdditionalParam off } Block { BlockType DataStoreMemory Name "Posicion \nactual" Position [220, 21, 259, 60] DataStoreName "Posicion" ReadBeforeWriteMsg "warning" WriteAfterWriteMsg "warning" WriteAfterReadMsg "warning" InitialValue "0" RTWStateStorageClass "ExportedGlobal" VectorParams1D on ShowAdditionalParam off } Block { BlockType SubSystem Name "Subsystem" Ports [1, 1] Position [672, 380, 708, 420] Orientation "down" NamePlacement "alternate" MinAlgLoopOccurrences off RTWSystemCode "Auto" FunctionWithSeparateData off MaskHideContents off System { Name "Subsystem" Location [503, 462, 839, 698] Open off ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "100" Block { BlockType Inport Name "In1" Position [20, 133, 50, 147] IconDisplay "Port number" } Block { BlockType Constant Name "AngleRatio" Position [80, 25, 110, 55] Orientation "left" SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion3" Position [150, 85, 205, 105] ShowName off OutDataTypeMode "int32" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType Product Name "Divide" Ports [2, 1] Position [85, 76, 115, 109] Inputs "**" CollapseMode "All dimensions" InputSameDT off OutDataTypeMode "Inherit via internal rule" OutScaling "2^-10" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType Outport Name "Out1" Position [230, 88, 260, 102] IconDisplay "Port number" BusOutputAsStruct off } Line { SrcBlock "AngleRatio" SrcPort 1 Points [-45, 0; 0, 45] DstBlock "Divide" DstPort 1 } Line { SrcBlock "Divide" SrcPort 1 DstBlock "Data Type Conversion3" DstPort 1 } Line { SrcBlock "Data Type Conversion3" SrcPort 1 DstBlock "Out1" DstPort 1 } Line { SrcBlock "In1" SrcPort 1 Points [0, -40] DstBlock "Divide" DstPort 2 } } } Block { BlockType Sum Name "Sum" Ports [2, 1] Position [160, 325, 180, 355] ShowName off IconShape "round" Inputs "-+" CollapseMode "All dimensions" InputSameDT off OutDataTypeMode "Inherit via internal rule" SampleTime ".001" } Block { BlockType Reference Name "TX Output Multiplexed\nfor Matlab / Labview" Tag "dsPIC_TX_Multiplexed" Ports [2] Position [590, 480, 695, 540] BackgroundColor "gray" Priority "5" SourceBlock "dsPICdrivers/Serial PORT/TX Output Multiple" "xed\nfor Matlab // Labview" SourceType "send structured data frame to Matlab / Labv" "iew" UART "1" CleverSpreadingChk on CleverSpreading "1" CHANNEL "[0 1 ]" CHANNELBLOCKED "[]" CHANNELBLOCKED_BITEWISE "0" Status "OK" } Block { BlockType Constant Name "qpd" Position [145, 255, 175, 285] Value "0" OutDataTypeMode "int32" SampleTime ".001" } Line { SrcBlock "Comparador de niveles" SrcPort 1 DstBlock "Inc/Dec motion" DstPort 1 } Line { SrcBlock "Data Store\nRead" SrcPort 1 Points [80, 0] DstBlock "Subsystem" DstPort 1 } Line { SrcBlock "Subsystem" SrcPort 1 Points [0, 25; -275, 0] Branch { Points [-245, 0] Branch { DstBlock "Sum" DstPort 2 } Branch { Points [0, -75] DstBlock "PID Control" DstPort 2 } } Branch { Points [0, 45] DstBlock "Data Type Conversion1" DstPort 1 } } Line { Labels [0, 0] SrcBlock "Sum" SrcPort 1 Points [20, 0] Branch { DstBlock "PID Control" DstPort 1 } Branch { Points [0, -90] DstBlock "Display" DstPort 1 } } Line { SrcBlock "Comparador de niveles" SrcPort 2 DstBlock "Inc/Dec motion" DstPort 2 } Line { SrcBlock "Inc/Dec motion" SrcPort 1 DstBlock "Incrementa \nPos Deseada" DstPort enable } Line { SrcBlock "Inc/Dec motion" SrcPort 2 Points [39, 0] DstBlock "Decrementa \nPos Deseada" DstPort enable } Line { SrcBlock "Data Store\nPosicion \ndeseada" SrcPort 1 Points [0, 60] Branch { Points [0, 215] DstBlock "Data Type Conversion" DstPort 1 } Branch { DstBlock "Sum" DstPort 1 } } Line { Name "current_position" Labels [1, 1] SrcBlock "Get Position \n(Called Every Sample Time)" SrcPort 1 DstBlock "Data Store\nWrite" DstPort 1 } Line { SrcBlock "PID Control" SrcPort 1 DstBlock "PWM \nDIR\nBRK" DstPort 1 } Line { SrcBlock "PID Control" SrcPort 2 DstBlock "PWM \nDIR\nBRK" DstPort 2 } Line { SrcBlock "PID Control" SrcPort 3 DstBlock "PWM \nDIR\nBRK" DstPort 3 } Line { SrcBlock "Data Type Conversion1" SrcPort 1 DstBlock "TX Output Multiplexed\nfor Matlab / Labview" DstPort 1 } Line { SrcBlock "Data Type Conversion" SrcPort 1 DstBlock "TX Output Multiplexed\nfor Matlab / Labview" DstPort 2 } Line { SrcBlock "Del ADC\nfiltrado" SrcPort 1 DstBlock "Comparador de niveles" DstPort 1 } Annotation { Name "set the saturate on integer overflow on all" " addition or multiplication " Position [187, 490] } Annotation { Name "set the negative saturation at 0 directly N" "OT DONE " Position [148, 508] } Annotation { Name "The Directional D0 signal should be the sig" "n of the PID output value" Position [189, 472] } Annotation { Name "Notes from Lubin" Position [75, 448] } Annotation { Name "\n...\n. .\n>---->MOTOR>---->\n. " " .\n..." Position [483, 358] } Annotation { Name "have anti-windump or at least integrator sa" "turation mechanisms on PID controllers" Position [221, 526] } } } Block { BlockType Step Name "Step" Position [365, 30, 395, 60] Orientation "up" BackgroundColor "magenta" Time "0.002" Before "1" After "0" SampleTime "0.001" } Block { BlockType Reference Name "UART Configuration" Tag "dsPIC_config_UART" Ports [] Position [120, 100, 196, 152] BackgroundColor "lightBlue" DropShadow on Priority "2" List { ListType RTWdata RxBufferSize "32" } SourceBlock "dsPICdrivers/Serial PORT/UART Configuration" SourceType "Configure UART" UART "1" proposed_BAUD "2400" ALT_TX_RX off InterruptTxWhen "When Transmit Buffer is empty" TXInterruptPri "1" TxBufferSize "32" TXEN on InterruptRxWhen "When Receive Buffer is full (contain 4 characte" "rs)" RXInterruptPri "2" RxBufferSize "32" BAUD "2400" UxBRG "780" Info "UxBRG = 780 || Real Baud : 2401 || % erro" "r : 0.03201 || max 0.24008 Bytes / Step" RealBaud "0" } Block { BlockType Reference Name "dbl-click to open\nGraphical interface" Ports [] Position [20, 98, 87, 148] BackgroundColor "cyan" DropShadow on SourceBlock "dsPICdrivers/Serial PORT/dbl-click to open\nGra" "phical interface" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Nothing "0" } Line { SrcBlock "Step" SrcPort 1 Points [0, -21] DstBlock "Configure QEI\n(Called Once)" DstPort enable } Line { SrcBlock "Genera un retardo\nde 3 s para que estabilice\n" "el sistema (ADC)" SrcPort 1 Points [60, 0] DstBlock "Sistema" DstPort enable } Line { SrcBlock "Filtro Pasa Bajos" SrcPort 1 DstBlock "Sistema" DstPort 1 } Line { SrcBlock "Sensado de Fuerzas" SrcPort 1 DstBlock "Filtro Pasa Bajos" DstPort 1 } } }