Model { Name "PID20ejeYanalnivels" Version 6.6 MdlSubVersion 0 GraphicalInterface { NumRootInports 0 NumRootOutports 0 ParameterArgumentNames "" ComputedModelVersion "1.288" NumModelReferences 0 NumTestPointedSignals 0 } SavedCharacterEncoding "windows-1252" SaveDefaultBlockParams on SampleTimeColors off LibraryLinkDisplay "none" WideLines off ShowLineDimensions on ShowPortDataTypes on ShowLoopsOnError on IgnoreBidirectionalLines off ShowStorageClass off ShowTestPointIcons on ShowViewerIcons on SortedOrder on ExecutionContextIcon on ShowLinearizationAnnotations on ScopeRefreshTime 0.035000 OverrideScopeRefreshTime on DisableAllScopes off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" MinMaxOverflowArchiveMode "Overwrite" BlockNameDataTip off BlockParametersDataTip off BlockDescriptionStringDataTip off ToolBar on StatusBar on BrowserShowLibraryLinks off BrowserLookUnderMasks off Created "Tue Nov 11 16:59:50 2008" Creator "123" UpdateHistory "UpdateHistoryNever" ModifiedByFormat "%" LastModifiedBy "123" ModifiedDateFormat "%" LastModifiedDate "Mon Mar 23 11:49:35 2009" ModelVersionFormat "1.%" ConfigurationManager "None" SimulationMode "normal" LinearizationMsg "none" Profile off ParamWorkspaceSource "MATLABWorkspace" AccelSystemTargetFile "accel.tlc" AccelTemplateMakefile "accel_default_tmf" AccelMakeCommand "make_rtw" AccelVerboseBuild off TryForcingSFcnDF off RecordCoverage off CovPath "/" CovSaveName "covdata" CovMetricSettings "dw" CovNameIncrementing off CovHtmlReporting on covSaveCumulativeToWorkspaceVar on CovSaveSingleToWorkspaceVar on CovCumulativeVarName "covCumulativeData" CovCumulativeReport off CovReportOnPause on ExtModeBatchMode off ExtModeEnableFloating on ExtModeTrigType "manual" ExtModeTrigMode "normal" ExtModeTrigPort "1" ExtModeTrigElement "any" ExtModeTrigDuration 1000 ExtModeTrigDurationFloating "auto" ExtModeTrigHoldOff 0 ExtModeTrigDelay 0 ExtModeTrigDirection "rising" ExtModeTrigLevel 0 ExtModeArchiveMode "off" ExtModeAutoIncOneShot off ExtModeIncDirWhenArm off ExtModeAddSuffixToVar off ExtModeWriteAllDataToWs off ExtModeArmWhenConnect on ExtModeSkipDownloadWhenConnect off ExtModeLogAll on ExtModeAutoUpdateStatusClock on BufferReuse on ProdHWDeviceType "16-bit Generic" ShowModelReferenceBlockVersion off ShowModelReferenceBlockIO off Array { Type "Handle" Dimension 1 Simulink.ConfigSet { $ObjectID 1 Version "1.2.0" Array { Type "Handle" Dimension 8 Simulink.SolverCC { $ObjectID 2 Version "1.2.0" StartTime "0.0" StopTime ".002" AbsTol "auto" FixedStep "0.001" InitialStep "auto" MaxNumMinSteps "-1" MaxOrder 5 ConsecutiveZCsStepRelTol "10*128*eps" MaxConsecutiveZCs "1000" ExtrapolationOrder 4 NumberNewtonIterations 1 MaxStep "auto" MinStep "auto" MaxConsecutiveMinStep "1" RelTol "1e-3" SolverMode "Auto" Solver "FixedStepDiscrete" SolverName "FixedStepDiscrete" ZeroCrossControl "UseLocalSettings" AlgebraicLoopSolver "TrustRegion" SolverResetMethod "Fast" PositivePriorityOrder off AutoInsertRateTranBlk off SampleTimeConstraint "Unconstrained" RateTranMode "Deterministic" } Simulink.DataIOCC { $ObjectID 3 Version "1.2.0" Decimation "1" ExternalInput "[t, u]" FinalStateName "xFinal" InitialState "xInitial" LimitDataPoints on MaxDataPoints "1000" LoadExternalInput off LoadInitialState off SaveFinalState off SaveFormat "Array" SaveOutput on SaveState off SignalLogging on InspectSignalLogs off SaveTime on StateSaveName "xout" TimeSaveName "tout" OutputSaveName "yout" SignalLoggingName "logsout" OutputOption "RefineOutputTimes" OutputTimes "[]" Refine "1" } Simulink.OptimizationCC { $ObjectID 4 Version "1.2.0" BlockReduction on BooleanDataType on ConditionallyExecuteInputs on InlineParams off InlineInvariantSignals off OptimizeBlockIOStorage on BufferReuse on EnforceIntegerDowncast on ExpressionFolding on ExpressionDepthLimit 2147483647 FoldNonRolledExpr on LocalBlockOutputs on RollThreshold 5 SystemCodeInlineAuto off StateBitsets off DataBitsets off UseTempVars off ZeroExternalMemoryAtStartup on ZeroInternalMemoryAtStartup on InitFltsAndDblsToZero on NoFixptDivByZeroProtection off EfficientFloat2IntCast off OptimizeModelRefInitCode on LifeSpan "1" BufferReusableBoundary on } Simulink.DebuggingCC { $ObjectID 5 Version "1.2.0" RTPrefix "error" ConsistencyChecking "none" ArrayBoundsChecking "none" SignalInfNanChecking "none" ReadBeforeWriteMsg "UseLocalSettings" WriteAfterWriteMsg "UseLocalSettings" WriteAfterReadMsg "UseLocalSettings" AlgebraicLoopMsg "warning" ArtificialAlgebraicLoopMsg "warning" CheckSSInitialOutputMsg on CheckExecutionContextPreStartOutputMsg off CheckExecutionContextRuntimeOutputMsg off SignalResolutionControl "UseLocalSettings" BlockPriorityViolationMsg "warning" MinStepSizeMsg "warning" TimeAdjustmentMsg "none" MaxConsecutiveZCsMsg "error" SolverPrmCheckMsg "warning" InheritedTsInSrcMsg "warning" DiscreteInheritContinuousMsg "warning" MultiTaskDSMMsg "error" MultiTaskCondExecSysMsg "error" MultiTaskRateTransMsg "error" SingleTaskRateTransMsg "none" TasksWithSamePriorityMsg "warning" SigSpecEnsureSampleTimeMsg "warning" CheckMatrixSingularityMsg "none" IntegerOverflowMsg "warning" Int32ToFloatConvMsg "warning" ParameterDowncastMsg "error" ParameterOverflowMsg "error" ParameterUnderflowMsg "none" ParameterPrecisionLossMsg "warning" ParameterTunabilityLossMsg "warning" UnderSpecifiedDataTypeMsg "none" UnnecessaryDatatypeConvMsg "none" VectorMatrixConversionMsg "none" InvalidFcnCallConnMsg "error" FcnCallInpInsideContextMsg "Use local settings" SignalLabelMismatchMsg "none" UnconnectedInputMsg "warning" UnconnectedOutputMsg "warning" UnconnectedLineMsg "warning" SFcnCompatibilityMsg "none" UniqueDataStoreMsg "none" BusObjectLabelMismatch "warning" RootOutportRequireBusObject "warning" AssertControl "UseLocalSettings" EnableOverflowDetection off ModelReferenceIOMsg "none" ModelReferenceVersionMismatchMessage "none" ModelReferenceIOMismatchMessage "none" ModelReferenceCSMismatchMessage "none" ModelReferenceSimTargetVerbose off UnknownTsInhSupMsg "warning" ModelReferenceDataLoggingMessage "warning" ModelReferenceSymbolNameMessage "warning" ModelReferenceExtraNoncontSigs "error" StateNameClashWarn "warning" StrictBusMsg "Warning" } Simulink.HardwareCC { $ObjectID 6 Array { Type "Cell" Dimension 2 Cell "ProdHWDeviceType" Cell "ProdEqTarget" PropName "DisabledProps" } Version "1.2.0" ProdBitPerChar 8 ProdBitPerShort 16 ProdBitPerInt 16 ProdBitPerLong 32 ProdIntDivRoundTo "Undefined" ProdEndianess "LittleEndian" ProdWordSize 16 ProdShiftRightIntArith on ProdHWDeviceType "16-bit Generic" TargetBitPerChar 8 TargetBitPerShort 16 TargetBitPerInt 32 TargetBitPerLong 32 TargetShiftRightIntArith on TargetIntDivRoundTo "Undefined" TargetEndianess "Unspecified" TargetWordSize 32 TargetTypeEmulationWarnSuppressLevel 0 TargetPreprocMaxBitsSint 32 TargetPreprocMaxBitsUint 32 TargetHWDeviceType "32-bit Generic" TargetUnknown off ProdEqTarget on } Simulink.ModelReferenceCC { $ObjectID 7 Version "1.2.0" UpdateModelReferenceTargets "IfOutOfDateOrStructuralChange" CheckModelReferenceTargetMessage "error" ModelReferenceNumInstancesAllowed "Multi" ModelReferencePassRootInputsByReference on ModelReferenceMinAlgLoopOccurrences off } Simulink.RTWCC { $BackupClass "Simulink.RTWCC" $ObjectID 8 Array { Type "Cell" Dimension 1 Cell "TargetLang" PropName "DisabledProps" } Version "1.2.0" SystemTargetFile "dspic.tlc" GenCodeOnly off MakeCommand "make_rtw" GenerateMakefile on TemplateMakefile "dspic_pic30_gcc.tmf" PostCodeGenCommand "dsPIC_Compile()" Description "Embedded Target for Microchip dsPIC (real-t" "ime)" GenerateReport off SaveLog off RTWVerbose on RetainRTWFile off ProfileTLC off TLCDebug off TLCCoverage off TLCAssert off ProcessScriptMode "Default" ConfigurationMode "Optimized" ProcessScript "dspic_make_rtw_hook" ConfigAtBuild off CustomSource "myQEI.c" IncludeHyperlinkInReport off LaunchReport off TargetLang "C" IncludeBusHierarchyInRTWFileBlockHierarchyMap off IncludeERTFirstTime off Array { Type "Handle" Dimension 2 Simulink.CodeAppCC { $ObjectID 9 Version "1.2.0" ForceParamTrailComments off GenerateComments on IgnoreCustomStorageClasses off IncHierarchyInIds off MaxIdLength 31 PreserveName off PreserveNameWithParent off ShowEliminatedStatement off IncAutoGenComments off SimulinkDataObjDesc off SFDataObjDesc off IncDataTypeInIds off PrefixModelToSubsysFcnNames on MangleLength 1 CustomSymbolStrGlobalVar "$R$N$M" CustomSymbolStrType "$N$R$M" CustomSymbolStrField "$N$M" CustomSymbolStrFcn "$R$N$M$F" CustomSymbolStrBlkIO "rtb_$N$M" CustomSymbolStrTmpVar "$N$M" CustomSymbolStrMacro "$R$N$M" DefineNamingRule "None" ParamNamingRule "None" SignalNamingRule "None" InsertBlockDesc off SimulinkBlockComments on EnableCustomComments off InlinedPrmAccess "Literals" ReqsInCode off } Simulink.STFCustomTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 10 Array { Type "Cell" Dimension 5 Cell "GenerateSampleERTMain" Cell "MatFileLogging" Cell "SupportNonInlinedSFcns" Cell "UtilityFuncGeneration" Cell "IncludeMdlTerminateFcn" PropName "DisabledProps" } Version "1.2.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant off IncludeMdlTerminateFcn off CombineOutputUpdateFcns on SuppressErrorStatus on IncludeFileDelimiter "Auto" ERTCustomFileBanners on SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging off MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime off SupportNonInlinedSFcns off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off SystemTargetFile "dspic.tlc" DialogCategory 0 Array { Type "Handle" Dimension 1 Simulink.ERTTargetCC { $BackupClass "Simulink.TargetCC" $ObjectID 11 Array { Type "Cell" Dimension 8 Cell "GenerateSampleERTMain" Cell "GenerateErtSFunction" Cell "MatFileLogging" Cell "GRTInterface" Cell "ERTCustomFileTemplate" Cell "SupportNonInlinedSFcns" Cell "UtilityFuncGeneration" Cell "IncludeMdlTerminateFcn" PropName "DisabledProps" } Version "1.2.0" TargetFcnLib "ansi_tfl_tmw.mat" TargetLibSuffix "" TargetPreCompLibLocation "" GenFloatMathFcnCalls "ANSI_C" UtilityFuncGeneration "Auto" GenerateFullHeader on GenerateSampleERTMain off GenerateTestInterfaces off IsPILTarget off ModelReferenceCompliant off IncludeMdlTerminateFcn off CombineOutputUpdateFcns on SuppressErrorStatus on IncludeFileDelimiter "Auto" ERTCustomFileBanners on SupportAbsoluteTime on LogVarNameModifier "rt_" MatFileLogging off MultiInstanceERTCode off SupportNonFinite on SupportComplex on PurelyIntegerCode off SupportContinuousTime off SupportNonInlinedSFcns off EnableShiftOperators on ParenthesesLevel "Nominal" PortableWordSizes off ModelStepFunctionPrototypeControlCompliant off GenerateErtSFunction off GenerateASAP2 off ExtMode off ExtModeTransport 0 ExtModeStaticAlloc off ExtModeStaticAllocSize 1000000 ExtModeTesting off ExtModeMexFile "ext_comm" ExtModeIntrfLevel "Level1" InlinedParameterPlacement "NonHierarchical" TargetOS "BareBoardExample" MultiInstanceErrorCode "Error" RateGroupingCode on RootIOFormat "Individual arguments" RTWCAPISignals off RTWCAPIParams off RTWCAPIStates off ERTSrcFileBannerTemplate "dsPIC_code_template.cgt" ERTHdrFileBannerTemplate "dsPIC_code_template.cgt" ERTDataSrcFileTemplate "dsPIC_code_template.cgt" ERTDataHdrFileTemplate "dsPIC_code_template.cgt" ERTCustomFileTemplate "dsPIC_main.tlc" ModuleNamingRule "Unspecified" SignalDisplayLevel 10 ParamTuneLevel 10 GlobalDataDefinition "Auto" DataDefinitionFile "global.c" GlobalDataReference "Auto" DataReferenceFile "global.h" GRTInterface off PreserveExpressionOrder off PreserveIfCondition off EnableUserReplacementTypes off Array { Type "Struct" Dimension 1 MATStruct { double "" single "" int32 "" int16 "" int8 "" uint32 "" uint16 "" uint8 "" boolean "" int "" uint "" char "" } PropName "ReplacementTypes" } MemSecPackage "--- None ---" MemSecDataConstants "Default" MemSecDataIO "Default" MemSecDataInternal "Default" MemSecDataParameters "Default" MemSecFuncInitTerm "Default" MemSecFuncExecute "Default" } PropName "Components" } CustomProperty { DataType "string" Name "GMAKE_PLACE" Value "C:\\PROGRA~2\\MATLAB\\R2007a\\rtw\\bi" "n\\win32\\gmake" } CustomProperty { DataType "string" Name "OPTIM_GCC" Value "-mcpu=30f4012 -O3 -fschedule-insns -f" "schedule-insns2" } CustomProperty { DataType "string" Name "LDFLAGS" Value "-t --report-mem -Map ../untitled.map " "--heap 0 -cref" } CustomProperty { DataType "string" Name "LDPICTYPE" Value "-T C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\" "support\\dsPIC30F\\gld\\p30f4012.gld" } CustomProperty { DataType "string" Name "LDLIBPIC" Value "C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\lib" "\\libpic30-coff.a C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\lib\\dsPIC30F\\libp30f40" "12-coff.a C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\lib\\libc-coff.a C:\\PROGRA~2\\MI" "CROC~1\\MPLABC~1\\lib\\libm-coff.a" } CustomProperty { DataType "string" Name "PIC_INCLUDES" Value "-I C:\\PROGRA~2\\MICROC~1\\MPLABC~1\\" "include" } CustomProperty { DataType "string" Name "PIC_REF" Value "30f4012" } CustomProperty { DataType "string" Name "GCCPATH" Value "''" } } PropName "Components" } } hdlcoderui.hdlcc { $ObjectID 12 Description "HDL Coder custom configuration component" Version "1.2.0" Name "HDL Coder" Array { Type "Cell" Dimension 1 Cell "" PropName "HDLConfigFile" } HDLCActiveTab "0" } PropName "Components" } Name "Configuration" CurrentDlgPage "Diagnostics/Data Validity" } PropName "ConfigurationSets" } Simulink.ConfigSet { $PropName "ActiveConfigurationSet" $ObjectID 1 } BlockDefaults { Orientation "right" ForegroundColor "black" BackgroundColor "white" DropShadow off NamePlacement "normal" FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" ShowName on } BlockParameterDefaults { Block { BlockType Constant Value "1" VectorParams1D on SamplingMode "Sample based" OutDataTypeMode "Inherit from 'Constant value'" OutDataType "sfix(16)" ConRadixGroup "Use specified scaling" OutScaling "2^0" SampleTime "inf" FramePeriod "inf" } Block { BlockType DataTypeConversion OutDataTypeMode "Inherit via back propagation" OutDataType "sfix(16)" OutScaling "2^0" LockScale off ConvertRealWorld "Real World Value (RWV)" RndMeth "Zero" SaturateOnIntegerOverflow on SampleTime "-1" } Block { BlockType DiscreteTransferFcn Numerator "[1]" Denominator "[1 0.5]" SampleTime "1" StateMustResolveToSignalObject off RTWStateStorageClass "Auto" Realization "auto" } Block { BlockType Ground } Block { BlockType Inport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" LatchByDelayingOutsideSignal off LatchByCopyingInsideSignal off Interpolate on } Block { BlockType Logic Operator "AND" Inputs "2" IconShape "rectangular" AllPortsSameDT on OutDataTypeMode "Logical (see Configuration Parameters: Optimiza" "tion)" LogicDataType "uint(8)" SampleTime "-1" } Block { BlockType Outport Port "1" UseBusObject off BusObject "BusObject" BusOutputAsStruct off PortDimensions "-1" SampleTime "-1" DataType "auto" OutDataType "sfix(16)" OutScaling "2^0" SignalType "auto" SamplingMode "auto" OutputWhenDisabled "held" InitialOutput "[]" } Block { BlockType RelationalOperator Operator ">=" InputSameDT on LogicOutDataTypeMode "Logical (see Configuration Parameters: Optimiza" "tion)" LogicDataType "uint(8)" ZeroCross on SampleTime "-1" } Block { BlockType "S-Function" FunctionName "system" SFunctionModules "''" PortCounts "[]" } Block { BlockType SubSystem ShowPortLabels "FromPortIcon" Permissions "ReadWrite" PermitHierarchicalResolution "All" TreatAsAtomicUnit off SystemSampleTime "-1" RTWFcnNameOpts "Auto" RTWFileNameOpts "Auto" RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" SimViewingDevice off DataTypeOverride "UseLocalSettings" MinMaxOverflowLogging "UseLocalSettings" } Block { BlockType Terminator } } AnnotationDefaults { HorizontalAlignment "center" VerticalAlignment "middle" ForegroundColor "black" BackgroundColor "white" DropShadow off FontName "Arial" FontSize 10 FontWeight "normal" FontAngle "normal" UseDisplayTextAsClickCallback off } LineDefaults { FontName "Arial" FontSize 9 FontWeight "normal" FontAngle "normal" } System { Name "PID20ejeYanalnivels" Location [358, 95, 1174, 625] Open on ModelBrowserVisibility off ModelBrowserWidth 200 ScreenColor "white" PaperOrientation "landscape" PaperPositionMode "auto" PaperType "usletter" PaperUnits "inches" TiledPaperMargins [0.500000, 0.500000, 0.500000, 0.500000] TiledPageScale 1 ShowPageBoundaries off ZoomFactor "105" ReportName "simulink-default.rpt" Block { BlockType Constant Name "3900 a 2MIPS 64Ms\n5000 84Ms\n40000 full\n20000" " 50%" Position [365, 25, 420, 55] Value "5000" OutDataTypeMode "uint16" SampleTime ".001" } Block { BlockType Reference Name "<1,6V ON" Ports [1, 1] Position [500, 103, 550, 127] SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo " "Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<=" const "384" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "<1,6V ON1" Ports [1, 1] Position [500, 149, 550, 171] SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo " "Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop "<=" const "180" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "> 2,68V ON" Ports [1, 1] Position [500, 197, 545, 223] SourceBlock "simulink/Logic and Bit\nOperations/Compare\nTo " "Constant" SourceType "Compare To Constant" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" relop ">=" const "700" LogicOutDataTypeMode "boolean" ZeroCross off } Block { BlockType Reference Name "ADC Input" Tag "dsPIC_ADC" Ports [0, 1] Position [35, 142, 110, 178] Priority "5" List { ListType RTWdata DMAChannel "0" } SourceBlock "dsPICdrivers/Peripheral I//O/ADC Input" SourceType "dsPIC : ADC10" ADC_TYPE "10 bits" ADC_MODE "Continuous sampling & get last channel value" NbrSampleStep "1" VoltRefpopup "AVdd - AVss" OutFormatBitspopup "0000 00dd dddd dddd : Integer" InterruptPriority "1" ANCHANNELS "[0]" MaxName "ANmax = 1024" Rin "1e2" ADCS "9" SAMC "1" Temperature "25" DMAChannel "0" SampleTime ".001" Status "OK | Tsmp=1.667e-007 | T/Channel=2.167e-006 " "| Tall=2.167e-006" } Block { BlockType Reference Name "Configure Model \nfor dsPIC" Ports [] Position [125, 15, 218, 58] ForegroundColor "blue" BackgroundColor "yellow" DropShadow on SourceBlock "dsPICdrivers/Simulink Configuration/Configure M" "odel \nfor dsPIC" SourceType "" } Block { BlockType DataTypeConversion Name "Data Type Conversion" Position [365, 152, 415, 168] OutDataTypeMode "uint16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion1" Position [150, 152, 200, 168] OutDataTypeMode "double" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion2" Position [170, 261, 225, 279] OutDataTypeMode "int16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion3" Position [355, 251, 405, 269] OutDataTypeMode "int16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType DataTypeConversion Name "Data Type Conversion4" Position [560, 251, 615, 269] Orientation "left" OutDataTypeMode "int16" RndMeth "Floor" SaturateOnIntegerOverflow off SampleTime ".001" } Block { BlockType Reference Name "Generate Code" Ports [] Position [240, 15, 338, 59] ForegroundColor "blue" BackgroundColor "yellow" DropShadow on SourceBlock "dsPICdrivers/Simulink Configuration/Generate Co" "de" SourceType "" } Block { BlockType Logic Name "Logical\nOperator2" Ports [2, 1] Position [595, 172, 625, 203] Operator "OR" AllPortsSameDT off OutDataTypeMode "Boolean" SampleTime ".001" } Block { BlockType DiscreteTransferFcn Name "Low pass Filter" Position [235, 131, 320, 189] Numerator "[.01478 .01478]" Denominator "[1 -.9704]" SampleTime ".001" } Block { BlockType Reference Name "Master" Tag "dsPIC_MASTER" Ports [] Position [15, 15, 108, 60] BackgroundColor "lightBlue" DropShadow on Priority "1" List { ListType RTWdata NumBusyPort "-1" } SourceBlock "dsPICdrivers/Master" SourceType "Master" TimeStepType "Timer1" picType "30f4012" fcy "30e6" Quartz_33f "5e6" PLLActive_33f off fcyDesired_33f "0" tmr1 "[1 29999 0]" tmr1Info "Time Step : 0.001 ; Error : 0% PR1=29999" tmr2345 "[0 0 0 0]" tmr2345cfg "[-1 -1 -1 -1]" IOautoConf on typePort "[ 0 0 0 0 0 0 0 0 0 0 0 0" " 0 0 0 0 8 0 0 0 0 0 0 0 0 0 0 0 0 0 0 " " 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 10 10 " " 0 0 0 0 0 0 0 0 0 0 0 0 0 0 11 0 0 0 0 " "0 0 0 0 0 0 0 0 0 0 0 0 0 4 5 0 0 0 0 0" " 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 " " 0 0 0 0 ]" TRIS "[ 65535 65535 65535 65532 65535 65535 655" "35 ]" ADPCFG "0" MasterBusyPort "None" MasterOverloadPort "None" FOSC "FRC_PLL16" ClockSwitchMonitor "Both disabled" TempProtection_33f "TEMP_ON" FPBOR "PBOR_OFF" PWRT "PWRT_OFF" MCLR "MCLR_DIS" PowerSave off OverrideFcy off NewFcy "1e6" } Block { BlockType Reference Name "PWM Motor Output" Tag "dsPIC_PWM_Motor" Ports [1] Position [455, 14, 500, 66] Priority "5" SourceBlock "dsPICdrivers/Peripheral I//O/PWM Motor Output" SourceType "PWM Motor Output" InputEnableChk off InputPeriodeChk off Channel "[1 ]" TPeriode ".01" PrescalerValue "16" PeriodeInteger "18750" MaxName "'PWM'" Centered off HChannelON off Info "Nbr Bits : 15.1946 || PWM = 37500 || Presca" "ler = 16" Delay "0" IntPriority "5" nbrPwmChannelPIC "3" Status "OK" } Block { BlockType Reference Name "TX Output Multiplexed\nfor Matlab / Labview" Tag "dsPIC_TX_Multiplexed" Ports [3] Position [234, 330, 586, 445] Orientation "down" NamePlacement "alternate" Priority "5" SourceBlock "dsPICdrivers/Serial PORT/TX Output Multiplexed" "\nfor Matlab // Labview" SourceType "send structured data frame to Matlab / Labview" UART "1" CleverSpreadingChk on CleverSpreading "1" CHANNEL "[0 1 2 ]" CHANNELBLOCKED "[]" CHANNELBLOCKED_BITEWISE "0" Status "OK" } Block { BlockType Reference Name "UART Configuration" Tag "dsPIC_config_UART" Ports [] Position [630, 19, 699, 53] BackgroundColor "lightBlue" DropShadow on Priority "2" List { ListType RTWdata RxBufferSize "32" } SourceBlock "dsPICdrivers/Serial PORT/UART Configuration" SourceType "Configure UART" UART "1" proposed_BAUD "115200" ALT_TX_RX off InterruptTxWhen "When Transmit Buffer is empty" TXInterruptPri "1" TxBufferSize "32" TXEN on InterruptRxWhen "When Receive Buffer is full (contain 4 characte" "rs)" RXInterruptPri "2" RxBufferSize "32" BAUD "115200" UxBRG "15" Info "UxBRG = 15 || Real Baud : 117188 || % err" "or : 1.7253 || max 11.7188 Bytes / Step" RealBaud "0" } Block { BlockType Reference Name "brake" Tag "dsPIC_Digital_Output" Ports [1] Position [665, 173, 735, 207] Priority "5" SourceBlock "dsPICdrivers/Digital I//O/Digital Output Write" SourceType "" PORT "D" Pin "[1]" Simultaneous off OrderingInOutPopup "None" } Block { BlockType Reference Name "dbl-click to open\nGraphical interface" Ports [] Position [530, 20, 598, 53] BackgroundColor "cyan" DropShadow on SourceBlock "dsPICdrivers/Serial PORT/dbl-click to open\nGra" "phical interface" SourceType "" ShowPortLabels "FromPortIcon" SystemSampleTime "-1" FunctionWithSeparateData off RTWMemSecFuncInitTerm "Inherit from model" RTWMemSecFuncExecute "Inherit from model" RTWMemSecDataConstants "Inherit from model" RTWMemSecDataInternal "Inherit from model" RTWMemSecDataParameters "Inherit from model" Nothing "0" } Block { BlockType Reference Name "direccion" Tag "dsPIC_Digital_Output" Ports [1] Position [650, 100, 720, 130] Priority "5" SourceBlock "dsPICdrivers/Digital I//O/Digital Output Write" SourceType "" PORT "D" Pin "[0]" Simultaneous off OrderingInOutPopup "None" } Line { SrcBlock "Low pass Filter" SrcPort 1 Points [15, 0] Branch { DstBlock "Data Type Conversion" DstPort 1 } Branch { DstBlock "Data Type Conversion3" DstPort 1 } } Line { SrcBlock "Data Type Conversion" SrcPort 1 Points [45, 0] Branch { Points [0, 50] DstBlock "> 2,68V ON" DstPort 1 } Branch { Points [0, 0] Branch { Points [0, -45] DstBlock "<1,6V ON" DstPort 1 } Branch { DstBlock "<1,6V ON1" DstPort 1 } } } Line { SrcBlock "Data Type Conversion1" SrcPort 1 DstBlock "Low pass Filter" DstPort 1 } Line { SrcBlock "ADC Input" SrcPort 1 Points [10, 0] Branch { DstBlock "Data Type Conversion1" DstPort 1 } Branch { Points [0, 110] DstBlock "Data Type Conversion2" DstPort 1 } } Line { SrcBlock "<1,6V ON" SrcPort 1 DstBlock "direccion" DstPort 1 } Line { SrcBlock "> 2,68V ON" SrcPort 1 Points [20, 0; 0, -15] DstBlock "Logical\nOperator2" DstPort 2 } Line { SrcBlock "<1,6V ON1" SrcPort 1 Points [10, 0; 0, 20] DstBlock "Logical\nOperator2" DstPort 1 } Line { SrcBlock "Logical\nOperator2" SrcPort 1 Points [10, 0] Branch { DstBlock "brake" DstPort 1 } Branch { Points [0, 70] DstBlock "Data Type Conversion4" DstPort 1 } } Line { SrcBlock "3900 a 2MIPS 64Ms\n5000 84Ms\n40000 full\n20000" " 50%" SrcPort 1 DstBlock "PWM Motor Output" DstPort 1 } Line { SrcBlock "Data Type Conversion2" SrcPort 1 Points [65, 0] DstBlock "TX Output Multiplexed\nfor Matlab / Labview" DstPort 1 } Line { SrcBlock "Data Type Conversion3" SrcPort 1 DstBlock "TX Output Multiplexed\nfor Matlab / Labview" DstPort 2 } Line { SrcBlock "Data Type Conversion4" SrcPort 1 Points [-30, 0] DstBlock "TX Output Multiplexed\nfor Matlab / Labview" DstPort 3 } } }